A FPGA-Based Systolic Array Prototype Implementing the Quadrant Interlocking Factorization Method

M. Ch. Karra, M. P. Bekakos. A FPGA-Based Systolic Array Prototype Implementing the Quadrant Interlocking Factorization Method. The Journal of Supercomputing, 37(3):319-331, 2006. [doi]

@article{KarraB06,
  title = {A FPGA-Based Systolic Array Prototype Implementing the Quadrant Interlocking Factorization Method},
  author = {M. Ch. Karra and M. P. Bekakos},
  year = {2006},
  doi = {10.1007/s11227-006-6633-x},
  url = {http://dx.doi.org/10.1007/s11227-006-6633-x},
  tags = {rule-based},
  researchr = {https://researchr.org/publication/KarraB06},
  cites = {0},
  citedby = {0},
  journal = {The Journal of Supercomputing},
  volume = {37},
  number = {3},
  pages = {319-331},
}