An FPGA-accelerated high-throughput data optimization system for high-speed transfer via wide area network

Kentaro Katayama, Hidetoshi Matsumura, Hiroaki Kameyama, Shinichi Sazawa, Yasuhiro Watanabe. An FPGA-accelerated high-throughput data optimization system for high-speed transfer via wide area network. In International Conference on Field Programmable Technology, ICFPT 2017, Melbourne, Australia, December 11-13, 2017. pages 211-214, IEEE, 2017. [doi]

@inproceedings{KatayamaMKSW17,
  title = {An FPGA-accelerated high-throughput data optimization system for high-speed transfer via wide area network},
  author = {Kentaro Katayama and Hidetoshi Matsumura and Hiroaki Kameyama and Shinichi Sazawa and Yasuhiro Watanabe},
  year = {2017},
  doi = {10.1109/FPT.2017.8280143},
  url = {https://doi.org/10.1109/FPT.2017.8280143},
  researchr = {https://researchr.org/publication/KatayamaMKSW17},
  cites = {0},
  citedby = {0},
  pages = {211-214},
  booktitle = {International Conference on Field Programmable Technology, ICFPT 2017, Melbourne, Australia, December 11-13, 2017},
  publisher = {IEEE},
  isbn = {978-1-5386-2656-6},
}