Norito Kato, Masanori Yamato, Osamu Tujimoto, Mikiko Sato, Koichi Sasada, Kaname Uchikura, Mitaro Namiki, Hironori Nakajo. Dynamic Allocation of Physical Register Banks for an SMT Processor. In Hamid R. Arabnia, editor, Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, PDPTA 04, June 21-24, 2004, Las Vegas, Nevada, USA, Volume 1. pages 317-323, CSREA Press, 2004.
@inproceedings{KatoYTSSUNN04,
title = {Dynamic Allocation of Physical Register Banks for an SMT Processor},
author = {Norito Kato and Masanori Yamato and Osamu Tujimoto and Mikiko Sato and Koichi Sasada and Kaname Uchikura and Mitaro Namiki and Hironori Nakajo},
year = {2004},
researchr = {https://researchr.org/publication/KatoYTSSUNN04},
cites = {0},
citedby = {0},
pages = {317-323},
booktitle = {Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, PDPTA 04, June 21-24, 2004, Las Vegas, Nevada, USA, Volume 1},
editor = {Hamid R. Arabnia},
publisher = {CSREA Press},
isbn = {1-892512-23-8},
}