Dynamic Allocation of Physical Register Banks for an SMT Processor

Norito Kato, Masanori Yamato, Osamu Tujimoto, Mikiko Sato, Koichi Sasada, Kaname Uchikura, Mitaro Namiki, Hironori Nakajo. Dynamic Allocation of Physical Register Banks for an SMT Processor. In Hamid R. Arabnia, editor, Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, PDPTA 04, June 21-24, 2004, Las Vegas, Nevada, USA, Volume 1. pages 317-323, CSREA Press, 2004.

Abstract

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