Low-Power and High Performance Sinusoidal Clocked Dynamic Circuit Design

Raghava Katreepalli, Hemanth Chemanchula, Themistoklis Haniotakis, Yiorgos Tsiatouhas. Low-Power and High Performance Sinusoidal Clocked Dynamic Circuit Design. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016, Pittsburgh, PA, USA, July 11-13, 2016. pages 367-372, IEEE, 2016. [doi]

Abstract

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