Raj S. Katti, Sudarshan K. Srinivasan. Efficient Hardware Implementation of a New Pseudo-random Bit Sequence Generator. In International Symposium on Circuits and Systems (ISCAS 2009), 24-17 May 2009, Taipei, Taiwan. pages 1393-1396, IEEE, 2009. [doi]
@inproceedings{KattiS09,
title = {Efficient Hardware Implementation of a New Pseudo-random Bit Sequence Generator},
author = {Raj S. Katti and Sudarshan K. Srinivasan},
year = {2009},
doi = {10.1109/ISCAS.2009.5118025},
url = {http://dx.doi.org/10.1109/ISCAS.2009.5118025},
researchr = {https://researchr.org/publication/KattiS09},
cites = {0},
citedby = {0},
pages = {1393-1396},
booktitle = {International Symposium on Circuits and Systems (ISCAS 2009), 24-17 May 2009, Taipei, Taiwan},
publisher = {IEEE},
}