Efficient Hardware Implementation of a New Pseudo-random Bit Sequence Generator - researchr publication

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Raj S. Katti, Sudarshan K. Srinivasan. Efficient Hardware Implementation of a New Pseudo-random Bit Sequence Generator. In International Symposium on Circuits and Systems (ISCAS 2009), 24-17 May 2009, Taipei, Taiwan. pages 1393-1396, IEEE, 2009. [doi]

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