A 12-bit, 2.5-bit/cycle, 1 MS/s two-stage cyclic ADC, for high-speed CMOS Image sensors

Amandeep Kaur, Deepak Mishra 0003, Mukul Sarkar. A 12-bit, 2.5-bit/cycle, 1 MS/s two-stage cyclic ADC, for high-speed CMOS Image sensors. In IEEE International Symposium on Circuits and Systems, ISCAS 2018, 27-30 May 2018, Florence, Italy. pages 1-5, IEEE, 2018. [doi]

Abstract

Abstract is missing.