Design of Robust and High-Performance 1-Bit CMOS Full Adder for Nanometer Design

Omid Kavehie, Mostafa Rahimi Azghadi, Keivan Navi, Amir-Pasha Mirbaha. Design of Robust and High-Performance 1-Bit CMOS Full Adder for Nanometer Design. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2008, 7-9 April 2008, Montpellier, France. pages 10-15, IEEE Computer Society, 2008. [doi]

@inproceedings{KavehieANM08,
  title = {Design of Robust and High-Performance 1-Bit CMOS Full Adder for Nanometer Design},
  author = {Omid Kavehie and Mostafa Rahimi Azghadi and Keivan Navi and Amir-Pasha Mirbaha},
  year = {2008},
  doi = {10.1109/ISVLSI.2008.16},
  url = {http://dx.doi.org/10.1109/ISVLSI.2008.16},
  tags = {design},
  researchr = {https://researchr.org/publication/KavehieANM08},
  cites = {0},
  citedby = {0},
  pages = {10-15},
  booktitle = {IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2008, 7-9 April 2008, Montpellier, France},
  publisher = {IEEE Computer Society},
}