Redundant Radix-2r Number System for Accelerating Arithmetic Operations on the FPGAs

Kensuke Kawakami, Koji Shigemoto, Koji Nakano. Redundant Radix-2r Number System for Accelerating Arithmetic Operations on the FPGAs. In Ninth International Conference on Parallel and Distributed Computing, Applications and Technologies, PDCAT 2008, Dunedin, Otago, New Zealand, 1-4 December 2008. pages 370-377, IEEE Computer Society, 2008. [doi]

@inproceedings{KawakamiSN08,
  title = {Redundant Radix-2r Number System for Accelerating Arithmetic Operations on the FPGAs},
  author = {Kensuke Kawakami and Koji Shigemoto and Koji Nakano},
  year = {2008},
  doi = {10.1109/PDCAT.2008.13},
  url = {http://dx.doi.org/10.1109/PDCAT.2008.13},
  researchr = {https://researchr.org/publication/KawakamiSN08},
  cites = {0},
  citedby = {0},
  pages = {370-377},
  booktitle = {Ninth International Conference on Parallel and Distributed Computing, Applications and Technologies, PDCAT 2008, Dunedin, Otago, New Zealand, 1-4 December 2008},
  publisher = {IEEE Computer Society},
}