An extendable global clock high-speed binary counter compatible to the FPGA CLBs

Sarang Kazeminia, Maryam Ghafoorzadeh, Faeze Noruzpur. An extendable global clock high-speed binary counter compatible to the FPGA CLBs. In 24th International Conference Mixed Design of Integrated Circuits and Systems, MIXDES 2017, Bydgoszcz, Poland, June 22-24, 2017. pages 220-223, IEEE, 2017. [doi]

Authors

Sarang Kazeminia

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Maryam Ghafoorzadeh

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Faeze Noruzpur

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