17.2 5.6Mb/mm2 1R1W 8T SRAM arrays operating down to 560mV utilizing small-signal sensing with charge-shared bitline and asymmetric sense amplifier in 14nm FinFET CMOS technology - researchr publication authors

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John Keane, Jaydeep Kulkarni, Kyung-Hoae Koo, Satyanand Nalam, Zheng Guo, Eric Karl, Kevin Zhang. 17.2 5.6Mb/mm2 1R1W 8T SRAM arrays operating down to 560mV utilizing small-signal sensing with charge-shared bitline and asymmetric sense amplifier in 14nm FinFET CMOS technology. In 2016 IEEE International Solid-State Circuits Conference, ISSCC 2016, San Francisco, CA, USA, January 31 - February 4, 2016. pages 308-309, IEEE, 2016. [doi]

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