A Layered Real-Time Specification of a RISC Processor

Peter Kearney, Mark Utting. A Layered Real-Time Specification of a RISC Processor. In Hans Langmaack, Willem P. de Roever, Jan Vytopil, editors, Formal Techniques in Real-Time and Fault-Tolerant Systems, Third International Symposium Organized Jointly with the Working Group Provably Correct Systems - ProCoS, Lübeck, Germany, September 19-23, Proceedings. Volume 863 of Lecture Notes in Computer Science, pages 455-475, Springer, 1994.

Abstract

Abstract is missing.