VLSI design of analog multiplier based on NMOS technology

M. L. Keote, R. S. Keote, Ankita Tijare. VLSI design of analog multiplier based on NMOS technology. In B. K. Mishra, editor, Proceedings of the ICWET 11 International Conference & Workshop on Emerging Trends in Technology, Mumbai, Maharashtra, India, February 25 - 26, 2011. pages 1201-1204, ACM, 2011. [doi]

Abstract

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