FPGA implementation of 64 bit Secure Force algorithm using full loop-unroll architecture - researchr publication authors

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Shujaat Khan, Muhammad Sohail Ibrahim, Haseeb Amjad, Kafeel Ahmed Khan, Mansoor Ebrahim. FPGA implementation of 64 bit Secure Force algorithm using full loop-unroll architecture. In 2015 IEEE International Conference on Control System, Computing and Engineering, ICCSCE 2015, Penang, Malaysia, November 27-29, 2015. pages 1-6, IEEE, 2015. [doi]

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