FPGA implementation of 64 bit Secure Force algorithm using full loop-unroll architecture

Shujaat Khan, Muhammad Sohail Ibrahim, Haseeb Amjad, Kafeel Ahmed Khan, Mansoor Ebrahim. FPGA implementation of 64 bit Secure Force algorithm using full loop-unroll architecture. In 2015 IEEE International Conference on Control System, Computing and Engineering, ICCSCE 2015, Penang, Malaysia, November 27-29, 2015. pages 1-6, IEEE, 2015. [doi]

@inproceedings{KhanIAKE15,
  title = {FPGA implementation of 64 bit Secure Force algorithm using full loop-unroll architecture},
  author = {Shujaat Khan and Muhammad Sohail Ibrahim and Haseeb Amjad and Kafeel Ahmed Khan and Mansoor Ebrahim},
  year = {2015},
  doi = {10.1109/ICCSCE.2015.7482148},
  url = {http://dx.doi.org/10.1109/ICCSCE.2015.7482148},
  researchr = {https://researchr.org/publication/KhanIAKE15},
  cites = {0},
  citedby = {0},
  pages = {1-6},
  booktitle = {2015 IEEE International Conference on Control System, Computing and Engineering, ICCSCE 2015, Penang, Malaysia, November 27-29, 2015},
  publisher = {IEEE},
  isbn = {978-1-4799-8252-3},
}