Hardware Accelerator for Probabilistic Inference in 65-nm CMOS

Osama Ullah Khan, David D. Wentzloff. Hardware Accelerator for Probabilistic Inference in 65-nm CMOS. IEEE Trans. VLSI Syst., 24(3):837-845, 2016. [doi]

@article{KhanW16,
  title = {Hardware Accelerator for Probabilistic Inference in 65-nm CMOS},
  author = {Osama Ullah Khan and David D. Wentzloff},
  year = {2016},
  doi = {10.1109/TVLSI.2015.2420663},
  url = {http://dx.doi.org/10.1109/TVLSI.2015.2420663},
  researchr = {https://researchr.org/publication/KhanW16},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {24},
  number = {3},
  pages = {837-845},
}