FPGA Implementation of Modulo (231-1) Adder

R. D. Kharadkar, N. B. Hulle. FPGA Implementation of Modulo (231-1) Adder. In 7th International Conference on Emerging Trends in Engineering & Technology, ICETET 2015, Kobe, Japan, November 18-20, 2015. pages 85-90, IEEE, 2015. [doi]

Authors

R. D. Kharadkar

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N. B. Hulle

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