R. D. Kharadkar, N. B. Hulle. FPGA Implementation of Modulo (231-1) Adder. In 7th International Conference on Emerging Trends in Engineering & Technology, ICETET 2015, Kobe, Japan, November 18-20, 2015. pages 85-90, IEEE, 2015. [doi]
@inproceedings{KharadkarH15,
title = {FPGA Implementation of Modulo (231-1) Adder},
author = {R. D. Kharadkar and N. B. Hulle},
year = {2015},
doi = {10.1109/ICETET.2015.23},
url = {https://doi.org/10.1109/ICETET.2015.23},
researchr = {https://researchr.org/publication/KharadkarH15},
cites = {0},
citedby = {0},
pages = {85-90},
booktitle = {7th International Conference on Emerging Trends in Engineering & Technology, ICETET 2015, Kobe, Japan, November 18-20, 2015},
publisher = {IEEE},
isbn = {978-1-4673-8305-9},
}