Critical hazard free test generation for asynchronous circuits

Ajay Khoche, Erik Brunvand. Critical hazard free test generation for asynchronous circuits. In 15th IEEE VLSI Test Symposium (VTS 97), April 27-May 1, 1997, Monterey, California, USA. pages 203-209, IEEE Computer Society, 1997. [doi]

@inproceedings{KhocheB97:0,
  title = {Critical hazard free test generation for asynchronous circuits},
  author = {Ajay Khoche and Erik Brunvand},
  year = {1997},
  url = {http://csdl.computer.org/comp/proceedings/vts/1997/7810/00/78100203abs.htm},
  tags = {testing},
  researchr = {https://researchr.org/publication/KhocheB97%3A0},
  cites = {0},
  citedby = {0},
  pages = {203-209},
  booktitle = {15th IEEE VLSI Test Symposium (VTS 97), April 27-May 1, 1997, Monterey, California, USA},
  publisher = {IEEE Computer Society},
}