Efficient Realization of Fixed-Point Binary and Ternary Adders on FPGAs

Burhan Khurshid, Roohie Naaz Mir. Efficient Realization of Fixed-Point Binary and Ternary Adders on FPGAs. Journal of Circuits, Systems, and Computers, 26(4):1-29, 2017. [doi]

@article{KhurshidM17,
  title = {Efficient Realization of Fixed-Point Binary and Ternary Adders on FPGAs},
  author = {Burhan Khurshid and Roohie Naaz Mir},
  year = {2017},
  doi = {10.1142/S0218126617500530},
  url = {http://dx.doi.org/10.1142/S0218126617500530},
  researchr = {https://researchr.org/publication/KhurshidM17},
  cites = {0},
  citedby = {0},
  journal = {Journal of Circuits, Systems, and Computers},
  volume = {26},
  number = {4},
  pages = {1-29},
}