An Analytical Latency Model for Networks-on-Chip

Abbas Eslami Kiasari, Zhonghai Lu, Axel Jantsch. An Analytical Latency Model for Networks-on-Chip. IEEE Trans. VLSI Syst., 21(1):113-123, 2013. [doi]

@article{KiasariLJ13,
  title = {An Analytical Latency Model for Networks-on-Chip},
  author = {Abbas Eslami Kiasari and Zhonghai Lu and Axel Jantsch},
  year = {2013},
  doi = {10.1109/TVLSI.2011.2178620},
  url = {http://dx.doi.org/10.1109/TVLSI.2011.2178620},
  researchr = {https://researchr.org/publication/KiasariLJ13},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {21},
  number = {1},
  pages = {113-123},
}