Pre-Silicon Validation of IPF Memory Ordering for Multi-Core Processors

Soohong P. Kim. Pre-Silicon Validation of IPF Memory Ordering for Multi-Core Processors. In Magdy S. Abadir, Li-C. Wang, editors, Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA. pages 105-110, IEEE Computer Society, 2005. [doi]

@inproceedings{Kim05:39,
  title = {Pre-Silicon Validation of IPF Memory Ordering for Multi-Core Processors},
  author = {Soohong P. Kim},
  year = {2005},
  doi = {10.1109/MTV.2005.19},
  url = {http://doi.ieeecomputersociety.org/10.1109/MTV.2005.19},
  researchr = {https://researchr.org/publication/Kim05%3A39},
  cites = {0},
  citedby = {0},
  pages = {105-110},
  booktitle = {Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA},
  editor = {Magdy S. Abadir and Li-C. Wang},
  publisher = {IEEE Computer Society},
}