BLPP: Improving the Performance of GPGPUs with Heterogeneous Memory through Bandwidth- and Latency-Aware Page Placement

Kyu Yeun Kim, Woongki Baek. BLPP: Improving the Performance of GPGPUs with Heterogeneous Memory through Bandwidth- and Latency-Aware Page Placement. In 36th IEEE International Conference on Computer Design, ICCD 2018, Orlando, FL, USA, October 7-10, 2018. pages 358-365, IEEE, 2018. [doi]

@inproceedings{KimB18-10,
  title = {BLPP: Improving the Performance of GPGPUs with Heterogeneous Memory through Bandwidth- and Latency-Aware Page Placement},
  author = {Kyu Yeun Kim and Woongki Baek},
  year = {2018},
  doi = {10.1109/ICCD.2018.00061},
  url = {https://doi.org/10.1109/ICCD.2018.00061},
  researchr = {https://researchr.org/publication/KimB18-10},
  cites = {0},
  citedby = {0},
  pages = {358-365},
  booktitle = {36th IEEE International Conference on Computer Design, ICCD 2018, Orlando, FL, USA, October 7-10, 2018},
  publisher = {IEEE},
  isbn = {978-1-5386-8477-1},
}