Concurrent transistor sizing and buffer insertion by considering cost-delay tradeoffs

Juho Kim, Cyrus Bamji, Yanbin Jiang, Sachin S. Sapatnekar. Concurrent transistor sizing and buffer insertion by considering cost-delay tradeoffs. In ISPD. pages 130-135, 1997. [doi]

@inproceedings{KimBJS97,
  title = {Concurrent transistor sizing and buffer insertion by considering cost-delay tradeoffs},
  author = {Juho Kim and Cyrus Bamji and Yanbin Jiang and Sachin S. Sapatnekar},
  year = {1997},
  doi = {10.1145/267665.267703},
  url = {http://doi.acm.org/10.1145/267665.267703},
  researchr = {https://researchr.org/publication/KimBJS97},
  cites = {0},
  citedby = {0},
  pages = {130-135},
  booktitle = {ISPD},
}