A CMOS delayed locked loop (DLL) for reducing clock skew to under 500 ps - researchr publication

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Yong-Bin Kim, Tom Chen. A CMOS delayed locked loop (DLL) for reducing clock skew to under 500 ps. In Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, Nippon Convention Center, Chiba, Japan, January 28-31, 1997. pages 681-682, IEEE, 1997. [doi]

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