Design of asynchronous RISC CPU register-file Write-Back queue

Matthew M. Kim, Karl M. Fant, Paul Beckett. Design of asynchronous RISC CPU register-file Write-Back queue. In 2015 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2015, Daejeon, South Korea, October 5-7, 2015. pages 31-36, IEEE, 2015. [doi]

@inproceedings{KimFB15,
  title = {Design of asynchronous RISC CPU register-file Write-Back queue},
  author = {Matthew M. Kim and Karl M. Fant and Paul Beckett},
  year = {2015},
  doi = {10.1109/VLSI-SoC.2015.7314387},
  url = {http://dx.doi.org/10.1109/VLSI-SoC.2015.7314387},
  researchr = {https://researchr.org/publication/KimFB15},
  cites = {0},
  citedby = {0},
  pages = {31-36},
  booktitle = {2015 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2015, Daejeon, South Korea, October 5-7, 2015},
  publisher = {IEEE},
  isbn = {978-1-4673-9140-5},
}