Sung Yong Kim, Xuefan Jin, Jung-Hoon Chun, Kee-Won Kwon. A digital DLL with 4-cycle lock time and 1/4 NAND-delay accuracy. In IEEE Asian Solid-State Circuits Conference, A-SSCC 2015, Xia'men, China, November 9-11, 2015. pages 1-4, IEEE, 2015. [doi]
Abstract is missing.