The following publications are possibly variants of this publication:
- Design of a 1.8V 8-bit 1GSPS cascaded-folding CMOS A/D converter based on a folder averaging techniqueDongheon Lee, Seunghun Kim, Jooho Hwang, Junho Moon, Minkyu Song. socc 2009: 79-82 [doi]
- A 65 nm 1.2 V 7-bit 1 GSPS Folding-Interpolation A/D Converter with a Digitally Self-Calibrated Vector GeneratorDaeyun Kim, Minkyu Song. ieicet, 94-C(7):1199-1205, 2011. [doi]
- A digitally self-calibrated low-noise 7-bit folding A/D converterMinah Kwon, Dahsom Kim, Daeyun Kim, Junho Moon, Minkyu Song. socc 2010: 39-43 [doi]
- Design of a 1.8 V 6-bit Folding Interpolation CMOS A/D Converter with a 0.93 [pJ/convstep] Figure-of-MeritSanghoon Hwang, Junho Moon, Minkyu Song. ieicet, 91-C(2):213-219, 2008. [doi]
- Design of a 1.8V 8-bit 500MSPS folding-interpolation CMOS A/D converter with a folder averaging techniqueDongJin Lee, Jaewon Song, Jongha Shin, Sanghoon Hwang, Minkyu Song, Tad Wysocki. ecctd 2007: 356-359 [doi]