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Kyung Ki Kim, Yong-Bin Kim, Minsu Choi, Nohpill Park. Leakage Minimization Technique for Nanoscale CMOS VLSI. IEEE Design & Test of Computers, 24(4):322-330, 2007. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Standby Leakage Power Reduction Technique for Nanoscale CMOS VLSI SystemsHeungJun Jeon, Yong-Bin Kim, Minsu Choi. tim, 59(5):1127-1133, 2010. [doi] Simultaneous Switching Noise Minimization Technique Using Dual Layer Power Line Mutual InductorsYongha Lee, Jongho Choi, Gyu Moon, Jeomkeun Kim. vlsi, 2001(3):449-455, 2001. [doi]
The following publications are possibly variants of this publication: