Dynamic Vt SRAM: a leakage tolerant cache memory for low voltage microprocessors

Chris H. Kim, Kaushik Roy. Dynamic Vt SRAM: a leakage tolerant cache memory for low voltage microprocessors. In Vivek De, Mary Jane Irwin, Ingrid Verbauwhede, Christian Piguet, editors, Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002, Monterey, California, USA, August 12-14, 2002. pages 251-254, ACM, 2002. [doi]

Authors

Chris H. Kim

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Kaushik Roy

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