SooYeon Kim, Minkyu Song. Design of a novel 3.3 V CMOS logarithmic amplifier with a two step linear limiting architecture. In IEEE Asia Pacific Conference on Circuits and Systems 2002, APCCAS 2002, Singapore, 16-18 December 2002. pages 131-134, IEEE, 2002. [doi]
@inproceedings{KimS02:5,
title = {Design of a novel 3.3 V CMOS logarithmic amplifier with a two step linear limiting architecture},
author = {SooYeon Kim and Minkyu Song},
year = {2002},
doi = {10.1109/APCCAS.2002.1114922},
url = {http://dx.doi.org/10.1109/APCCAS.2002.1114922},
tags = {architecture, design},
researchr = {https://researchr.org/publication/KimS02%3A5},
cites = {0},
citedby = {0},
pages = {131-134},
booktitle = {IEEE Asia Pacific Conference on Circuits and Systems 2002, APCCAS 2002, Singapore, 16-18 December 2002},
publisher = {IEEE},
}