2, 35-μW, 8.87-ps-resolution CMOS time-to-digital converter using dual-slope architecture

Yeo Myung Kim, Doohyun Shon, Tae-Wook Kim. 2, 35-μW, 8.87-ps-resolution CMOS time-to-digital converter using dual-slope architecture. I. J. Circuit Theory and Applications, 45(4):466-482, 2017. [doi]

Abstract

Abstract is missing.