36-Gb/s CDR IC using simple passive loop filter combined with passive load in phase detector

Keiji Kishine, Hiroshi Inoue, Kosuke Furuichi, Natsuyuki Koda, Hiromu Uemura, Hiromi Inaba, Makoto Nakamura, Akira Tsuchiya. 36-Gb/s CDR IC using simple passive loop filter combined with passive load in phase detector. In International SoC Design Conference, ISOCC 2016, Jeju, South Korea, October 23-26, 2016. pages 61-62, IEEE, 2016. [doi]

@inproceedings{KishineIFKUINT16,
  title = {36-Gb/s CDR IC using simple passive loop filter combined with passive load in phase detector},
  author = {Keiji Kishine and Hiroshi Inoue and Kosuke Furuichi and Natsuyuki Koda and Hiromu Uemura and Hiromi Inaba and Makoto Nakamura and Akira Tsuchiya},
  year = {2016},
  doi = {10.1109/ISOCC.2016.7799708},
  url = {http://dx.doi.org/10.1109/ISOCC.2016.7799708},
  researchr = {https://researchr.org/publication/KishineIFKUINT16},
  cites = {0},
  citedby = {0},
  pages = {61-62},
  booktitle = {International SoC Design Conference, ISOCC 2016, Jeju, South Korea, October 23-26, 2016},
  publisher = {IEEE},
  isbn = {978-1-5090-3219-8},
}