TRAIN: a virtual transaction layer architecture for TLM-based HW/SW codesign of synthesizable MPSoC

Wolfgang Klingauf, Hagen Gädke, Robert Günzel. TRAIN: a virtual transaction layer architecture for TLM-based HW/SW codesign of synthesizable MPSoC. In Georges G. E. Gielen, editor, Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006. pages 1318-1323, European Design and Automation Association, Leuven, Belgium, 2006. [doi]

@inproceedings{KlingaufGG06,
  title = {TRAIN: a virtual transaction layer architecture for TLM-based HW/SW codesign of synthesizable MPSoC},
  author = {Wolfgang Klingauf and Hagen Gädke and Robert Günzel},
  year = {2006},
  doi = {10.1145/1131843},
  url = {http://doi.acm.org/10.1145/1131843},
  tags = {architecture},
  researchr = {https://researchr.org/publication/KlingaufGG06},
  cites = {0},
  citedby = {0},
  pages = {1318-1323},
  booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany,  March 6-10, 2006},
  editor = {Georges G. E. Gielen},
  publisher = {European Design and Automation Association, Leuven, Belgium},
  isbn = {3-9810801-0-6},
}