An Optimal Design Methodology of Ternary Logic in Iso-device Ternary CMOS

JongHyun Ko, Kwanwoo Park, Suhyeong Yong, TaeGam Jeong, Taehak Kim, Taigon Song. An Optimal Design Methodology of Ternary Logic in Iso-device Ternary CMOS. In 51st IEEE International Symposium on Multiple-Valued Logic, ISMVL 2021, Nur-Sultan, Kazakhstan, May 25-27, 2021. pages 189-194, IEEE, 2021. [doi]

@inproceedings{KoPYJKS21,
  title = {An Optimal Design Methodology of Ternary Logic in Iso-device Ternary CMOS},
  author = {JongHyun Ko and Kwanwoo Park and Suhyeong Yong and TaeGam Jeong and Taehak Kim and Taigon Song},
  year = {2021},
  doi = {10.1109/ISMVL51352.2021.00040},
  url = {https://doi.org/10.1109/ISMVL51352.2021.00040},
  researchr = {https://researchr.org/publication/KoPYJKS21},
  cites = {0},
  citedby = {0},
  pages = {189-194},
  booktitle = {51st IEEE International Symposium on Multiple-Valued Logic, ISMVL 2021, Nur-Sultan, Kazakhstan, May 25-27, 2021},
  publisher = {IEEE},
  isbn = {978-1-7281-9224-6},
}