New built-in self-test technique based on addition/subtraction of selected node voltages

K. Y. Ko, Mike W. T. Wong. New built-in self-test technique based on addition/subtraction of selected node voltages. In 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan. pages 39, IEEE Computer Society, 2000. [doi]

Abstract

Abstract is missing.