A 90 nm 48 x 48 LUT-Based FPGA Enhancing Speed and Yield Utilizing Within-Die Delay Variations

Kazutoshi Kobayashi, Kazuya Katsuki, Manabu Kotani, Yuuri Sugihara, Yohei Kume, Hidetoshi Onodera. A 90 nm 48 x 48 LUT-Based FPGA Enhancing Speed and Yield Utilizing Within-Die Delay Variations. IEICE Transactions, 90-C(10):1919-1926, 2007. [doi]

Authors

Kazutoshi Kobayashi

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Kazuya Katsuki

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Manabu Kotani

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Yuuri Sugihara

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Yohei Kume

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Hidetoshi Onodera

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