A 90 nm 48 x 48 LUT-Based FPGA Enhancing Speed and Yield Utilizing Within-Die Delay Variations

Kazutoshi Kobayashi, Kazuya Katsuki, Manabu Kotani, Yuuri Sugihara, Yohei Kume, Hidetoshi Onodera. A 90 nm 48 x 48 LUT-Based FPGA Enhancing Speed and Yield Utilizing Within-Die Delay Variations. IEICE Transactions, 90-C(10):1919-1926, 2007. [doi]

@article{KobayashiKKSKO07,
  title = {A 90 nm 48 x 48 LUT-Based FPGA Enhancing Speed and Yield Utilizing Within-Die Delay Variations},
  author = {Kazutoshi Kobayashi and Kazuya Katsuki and Manabu Kotani and Yuuri Sugihara and Yohei Kume and Hidetoshi Onodera},
  year = {2007},
  doi = {10.1093/ietele/e90-c.10.1919},
  url = {http://dx.doi.org/10.1093/ietele/e90-c.10.1919},
  tags = {rule-based},
  researchr = {https://researchr.org/publication/KobayashiKKSKO07},
  cites = {0},
  citedby = {0},
  journal = {IEICE Transactions},
  volume = {90-C},
  number = {10},
  pages = {1919-1926},
}