FPGA Implementations of a Parallel Associative Processor with Multi-Comparand Multi-Search Operations - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Zbigniew Kokosinski, Bartlomiej Malus. FPGA Implementations of a Parallel Associative Processor with Multi-Comparand Multi-Search Operations. In 7th International Symposium on Parallel and Distributed Computing (ISPDC 2008), 1-5 July 2008, Krakow, Poland. pages 444-448, IEEE Computer Society, 2008. [doi]

This author has not been identified. Look up 'Zbigniew Kokosinski' in GoogleThis author has not been identified. Look up 'Bartlomiej Malus' in Google

runs on WebDSL