An implementation of an asychronous FPGA based on LEDR/four-phase-dual-rail hybrid architecture

Yoshiya Komatsu, Shota Ishihara, Masanori Hariyama, Michitaka Kameyama. An implementation of an asychronous FPGA based on LEDR/four-phase-dual-rail hybrid architecture. In Proceedings of the 16th Asia South Pacific Design Automation Conference, ASP-DAC 2011, Yokohama, Japan, January 25-27, 2011. pages 89-90, IEEE, 2011. [doi]

Authors

Yoshiya Komatsu

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Shota Ishihara

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Masanori Hariyama

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Michitaka Kameyama

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