An implementation of an asychronous FPGA based on LEDR/four-phase-dual-rail hybrid architecture

Yoshiya Komatsu, Shota Ishihara, Masanori Hariyama, Michitaka Kameyama. An implementation of an asychronous FPGA based on LEDR/four-phase-dual-rail hybrid architecture. In Proceedings of the 16th Asia South Pacific Design Automation Conference, ASP-DAC 2011, Yokohama, Japan, January 25-27, 2011. pages 89-90, IEEE, 2011. [doi]

@inproceedings{KomatsuIHK11,
  title = {An implementation of an asychronous FPGA based on LEDR/four-phase-dual-rail hybrid architecture},
  author = {Yoshiya Komatsu and Shota Ishihara and Masanori Hariyama and Michitaka Kameyama},
  year = {2011},
  doi = {10.1109/ASPDAC.2011.5722311},
  url = {http://dx.doi.org/10.1109/ASPDAC.2011.5722311},
  tags = {architecture},
  researchr = {https://researchr.org/publication/KomatsuIHK11},
  cites = {0},
  citedby = {0},
  pages = {89-90},
  booktitle = {Proceedings of the 16th Asia South Pacific Design Automation Conference, ASP-DAC 2011, Yokohama, Japan, January 25-27, 2011},
  publisher = {IEEE},
  isbn = {978-1-4244-7516-2},
}