Architectural design of an RISC processor for programmable logic controllers

Kyeonghoon Koo, Gab Seon Rho, Wook Hyun Kwon, Jaehyun Park, Naehyuck Chang. Architectural design of an RISC processor for programmable logic controllers. Journal of Systems Architecture, 44(5):311-325, 1998. [doi]

Abstract

Abstract is missing.