A quantitative analysis of fixed-point LDPC-decoder implementations using hardware-accelerated HDL emulations

Matthias Korb, Tobias G. Noll. A quantitative analysis of fixed-point LDPC-decoder implementations using hardware-accelerated HDL emulations. In 2012 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS XII, Samos, Greece, July 16-19, 2012. pages 294-301, IEEE, 2012. [doi]

@inproceedings{KorbN12,
  title = {A quantitative analysis of fixed-point LDPC-decoder implementations using hardware-accelerated HDL emulations},
  author = {Matthias Korb and Tobias G. Noll},
  year = {2012},
  doi = {10.1109/SAMOS.2012.6404189},
  url = {http://dx.doi.org/10.1109/SAMOS.2012.6404189},
  researchr = {https://researchr.org/publication/KorbN12},
  cites = {0},
  citedby = {0},
  pages = {294-301},
  booktitle = {2012 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS XII, Samos, Greece, July 16-19, 2012},
  publisher = {IEEE},
  isbn = {978-1-4673-2295-9},
}