Nectarios Koziris, Theodore Andronikos, George Economakos, George K. Papakonstantinou, Panayotis Tsanakas. Automatic Hardware Synthesis of Nested Loops Using UET Grids and VHDL. In Louis O. Hertzberger, Peter M. A. Sloot, editors, High-Performance Computing and Networking, International Conference and Exhibition, HPCN Europe 1997, Vienna, Austria, April 28-30, 1997, Proceedings. Volume 1225 of Lecture Notes in Computer Science, pages 888-897, Springer, 1997.
@inproceedings{KozirisAEPT97,
title = {Automatic Hardware Synthesis of Nested Loops Using UET Grids and VHDL},
author = {Nectarios Koziris and Theodore Andronikos and George Economakos and George K. Papakonstantinou and Panayotis Tsanakas},
year = {1997},
researchr = {https://researchr.org/publication/KozirisAEPT97},
cites = {0},
citedby = {0},
pages = {888-897},
booktitle = {High-Performance Computing and Networking, International Conference and Exhibition, HPCN Europe 1997, Vienna, Austria, April 28-30, 1997, Proceedings},
editor = {Louis O. Hertzberger and Peter M. A. Sloot},
volume = {1225},
series = {Lecture Notes in Computer Science},
publisher = {Springer},
isbn = {3-540-62898-3},
}