Olga Krestinskaya, Timur Ibrayev, Alex Pappachen James. Hierarchical Temporal Memory Features with Memristor Logic Circuits for Pattern Recognition. IEEE Trans. on CAD of Integrated Circuits and Systems, 37(6):1143-1156, 2018. [doi]
@article{KrestinskayaIJ18,
title = {Hierarchical Temporal Memory Features with Memristor Logic Circuits for Pattern Recognition},
author = {Olga Krestinskaya and Timur Ibrayev and Alex Pappachen James},
year = {2018},
doi = {10.1109/TCAD.2017.2748024},
url = {https://doi.org/10.1109/TCAD.2017.2748024},
researchr = {https://researchr.org/publication/KrestinskayaIJ18},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {37},
number = {6},
pages = {1143-1156},
}