Timing Verification and Delay Test Generation for Hierarchical Designs - researchr publication authors

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Arun Krishnamachary, Jacob A. Abraham, Raghuram S. Tupuri. Timing Verification and Delay Test Generation for Hierarchical Designs. In 14th International Conference on VLSI Design (VLSI Design 2001), 3-7 January 2001, Bangalore, India. pages 157-162, IEEE Computer Society, 2001. [doi]

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