A procedure for software synthesis from VHDL models - researchr publication authors

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Venkatram Krishnaswamy, Rajesh Gupta, Prithviraj Banerjee. A procedure for software synthesis from VHDL models. In Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, Nippon Convention Center, Chiba, Japan, January 28-31, 1997. pages 593-598, IEEE, 1997. [doi]

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