Margrit R. Krug, Marcelo Lubaszewski, Marcelo de Souza Moraes. Improving ATPG Gate-Level Fault Coverage by using Test Vectors generated from Behavioral HDL Descriptions. In IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006. pages 314-319, IEEE, 2006. [doi]
Abstract is missing.