RISC-V Processor Trace Encoder with Multiple Instructions Retirement Support

Halil Kükner, Gökhan Kaplayan, Ahmet Efe, Mehmet Ali Gülden. RISC-V Processor Trace Encoder with Multiple Instructions Retirement Support. In 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, VLSI-SoC 2022, Patras, Greece, October 3-5, 2022. pages 1-6, IEEE, 2022. [doi]

@inproceedings{KuknerKEG22,
  title = {RISC-V Processor Trace Encoder with Multiple Instructions Retirement Support},
  author = {Halil Kükner and Gökhan Kaplayan and Ahmet Efe and Mehmet Ali Gülden},
  year = {2022},
  doi = {10.1109/VLSI-SoC54400.2022.9939596},
  url = {https://doi.org/10.1109/VLSI-SoC54400.2022.9939596},
  researchr = {https://researchr.org/publication/KuknerKEG22},
  cites = {0},
  citedby = {0},
  pages = {1-6},
  booktitle = {30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, VLSI-SoC 2022, Patras, Greece, October 3-5, 2022},
  publisher = {IEEE},
  isbn = {978-1-6654-9005-4},
}